cpucounters.h

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/*
Copyright (c) 2009-2013, Intel Corporation
All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

    * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
    * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
    * Neither the name of Intel Corporation nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
// written by Roman Dementiev
//            Thomas Willhalm

#ifndef CPUCOUNTERS_HEADER
#define CPUCOUNTERS_HEADER

#define INTEL_PCM_VERSION "V2.8 ($Format:%ci ID=%h$)"

#ifndef INTELPCM_API
#define INTELPCM_API
#endif

#include "types.h"
#include "msr.h"
#include "pci.h"
#include "client_bw.h"
#include "width_extender.h"
#include <vector>
#include <limits>
#include <string>
#include <string.h>

#ifdef PCM_USE_PERF
#include <linux/perf_event.h>
#include <sys/syscall.h>
#include <errno.h>
#define PCM_PERF_COUNT_HW_REF_CPU_CYCLES (9)
#endif

#ifndef _MSC_VER
#define NOMINMAX
#include <semaphore.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <unistd.h>
#endif

class SystemCounterState;
class SocketCounterState;
class CoreCounterState;
class BasicCounterState;
class ServerUncorePowerState;
class PCM;

/*
        CPU performance monitoring routines

        A set of performance monitoring routines for recent Intel CPUs
*/

struct INTELPCM_API TopologyEntry // decribes a core
{
    int32 os_id;
    int32 socket;
    int32 core_id;

    TopologyEntry() : os_id(-1), socket(-1), core_id(-1) { }
};

class ServerPCICFGUncore
{
    int bus, groupnr;
    PciHandleM ** imcHandles;
    uint32 num_imc_channels;

    PciHandleM ** qpiLLHandles;
    uint32 num_qpi_ports;
    std::vector<uint64> qpi_speed;
    uint32 num_imc;
    uint32 MCX_CHY_REGISTER_DEV_ADDR[2][4];
    uint32 MCX_CHY_REGISTER_FUNC_ADDR[2][4];
    uint32 QPI_PORTX_REGISTER_DEV_ADDR[3];
    uint32 QPI_PORTX_REGISTER_FUNC_ADDR[3];

    static std::vector<std::pair<uint32,uint32> > socket2bus;
    void initSocket2Bus();

    ServerPCICFGUncore();                 // forbidden
    ServerPCICFGUncore(ServerPCICFGUncore &); // forbidden
    PciHandleM * createIntelPerfMonDevice(uint32 groupnr, uint32 bus, uint32 dev, uint32 func, bool checkVendor = false);

public:
    ServerPCICFGUncore(uint32 socket_, PCM * pcm);
    void program();
    uint64 getImcReads();
    uint64 getImcWrites();

    uint64 getIncomingDataFlits(uint32 port);

    uint64 getOutgoingDataNonDataFlits(uint32 port);
    
    virtual ~ServerPCICFGUncore();
    
    void program_power_metrics(int mc_profile);

    uint64 getQPIClocks(uint32 port);

    uint64 getQPIL0pTxCycles(uint32 port);
    uint64 getQPIL1Cycles(uint32 port);
    uint64 getDRAMClocks(uint32 channel);
    uint64 getMCCounter(uint32 channel, uint32 counter);
    uint64 getQPILLCounter(uint32 port, uint32 counter);

    void freezeCounters();
    void unfreezeCounters();

    uint64 computeQPISpeed(const uint32 ref_core, const int cpumodel);

    void enableJKTWorkaround(bool enable);
    
    uint32 getNumQPIPorts() const { return num_qpi_ports; }

    uint64 getQPILinkSpeed(const uint32 linkNr) const { 
    return qpi_speed.empty() ? 0 : qpi_speed[linkNr]; 
    }

    void reportQPISpeed() const
    {
        std::cerr.precision(1);
        std::cerr << std::fixed;
        for (uint32 i=0; i<qpi_speed.size(); ++i)
          std::cerr << "Max QPI link " << i << " speed: " << qpi_speed[i] / (1e9) << " GBytes/second (" << qpi_speed[i] / (2e9) << " GT/second)" << std::endl;
    }

    uint32 getNumMC() const { return num_imc; }

    uint32 getNumMCChannels() const { return num_imc_channels; }
};

class PCIeCounterState
{
    friend uint64 getNumberOfEvents(PCIeCounterState before, PCIeCounterState after);
    friend class PCM;
    uint64 data;
public:
    PCIeCounterState(): data(0)
    {
    }
    virtual ~PCIeCounterState() {}
};

#ifndef HACK_TO_REMOVE_DUPLICATE_ERROR 
template class INTELPCM_API std::allocator<TopologyEntry>;
template class INTELPCM_API std::vector<TopologyEntry>;
template class INTELPCM_API std::allocator<CounterWidthExtender*>;
template class INTELPCM_API std::vector<CounterWidthExtender*>;
template class INTELPCM_API std::allocator<uint32>;
template class INTELPCM_API std::vector<uint32>;
template class INTELPCM_API std::allocator<char>;
#endif

class INTELPCM_API PCM
{
    friend class BasicCounterState;
    friend class UncoreCounterState;
    PCM();     // forbidden to call directly because it is a singleton

    int32 cpu_family;
    int32 cpu_model, original_cpu_model;
    int32 threads_per_core;
    int32 num_cores;
    int32 num_sockets;
    int32 num_phys_cores_per_socket;
    int32 num_online_cores;
    uint32 core_gen_counter_num_max;
    uint32 core_gen_counter_num_used;
    uint32 core_gen_counter_width;
    uint32 core_fixed_counter_num_max;
    uint32 core_fixed_counter_num_used;
    uint32 core_fixed_counter_width;
    uint32 uncore_gen_counter_num_max;
    uint32 uncore_gen_counter_num_used;
    uint32 uncore_gen_counter_width;
    uint32 uncore_fixed_counter_num_max;
    uint32 uncore_fixed_counter_num_used;
    uint32 uncore_fixed_counter_width;
    int32 perfmon_version;
    int32 perfmon_config_anythread;
    uint64 nominal_frequency;
    uint64 max_qpi_speed; // in GBytes/second
    uint32 L3ScalingFactor;
    int32 pkgThermalSpecPower, pkgMinimumPower, pkgMaximumPower;

    std::vector<TopologyEntry> topology;
    std::string errorMessage;

    static PCM * instance;
    bool allow_multiple_instances;
    bool programmed_pmu;
    SafeMsrHandle ** MSR;
    ServerPCICFGUncore ** server_pcicfg_uncore;
    uint32 PCU_MSR_PMON_BOX_CTL_ADDR, PCU_MSR_PMON_CTRX_ADDR[4];
    double joulesPerEnergyUnit;
    std::vector<CounterWidthExtender*> snb_energy_status;
    std::vector<CounterWidthExtender*> jkt_dram_energy_status;


    ClientBW * clientBW;
    CounterWidthExtender * clientImcReads;
    CounterWidthExtender * clientImcWrites;
    CounterWidthExtender * clientIoRequests;

    bool disable_JKT_workaround;
    bool blocked; // track if time-driven counter update is running or not: PCM is blocked

    uint64 * coreCStateMsr; // MSR addresses of core C-state free-running counters
    uint64 * pkgCStateMsr; // MSR addresses of package C-state free-running counters

public:
    enum { MAX_C_STATE = 10 }; // max C-state on Intel architecture

    bool isCoreCStateResidencySupported(int state)
    {
          if (state == 0 || state == 1)
              return true;

          return (coreCStateMsr != NULL && state <= MAX_C_STATE && coreCStateMsr[state] != 0);
    }

    bool isPackageCStateResidencySupported(int state)
    {
        return (pkgCStateMsr != NULL && state <= MAX_C_STATE && pkgCStateMsr[state] != 0);
    }

    void setOutput(const std::string filename);

    void restoreOutput();

    // Arguments:
    //  -- 1 - program is running
    //  -- 0 -pgram is sleeping
    void setRunState(int new_state) { run_state = new_state; }

    // Results:
    //  -- 1 - program is running
    //  -- 0 -pgram is sleeping
    int getRunState(void) { return run_state; }

    bool isBlocked(void) { return blocked; }
    void setBlocked(const bool new_blocked) { blocked = new_blocked; }

    void allowMultipleInstances()
    {
        allow_multiple_instances = true;
    }

    enum ProgramMode {
        DEFAULT_EVENTS = 0,         
        CUSTOM_CORE_EVENTS = 1,     
        EXT_CUSTOM_CORE_EVENTS = 2, 
        INVALID_MODE                
    };

    enum ErrorCode {
        Success = 0,
        MSRAccessDenied = 1,
        PMUBusy = 2,
        UnknownError
    };

    struct CustomCoreEventDescription
    {
        int32 event_number, umask_value;
    };
    
    struct ExtendedCustomCoreEventDescription
    {
        FixedEventControlRegister * fixedCfg; // if NULL, then default configuration performed for fixed counters
        uint32 nGPCounters; // number of general purpose counters
        EventSelectRegister * gpCounterCfg; // general purpose counters, if NULL, then default configuration performed for GP counters
        uint64 OffcoreResponseMsrValue[2];
    };

private:
    ProgramMode mode;
    CustomCoreEventDescription coreEventDesc[4];

        #ifdef _MSC_VER
    HANDLE numInstancesSemaphore;     // global semaphore that counts the number of PCM instances on the system
        #else
    // global semaphore that counts the number of PCM instances on the system
    sem_t * numInstancesSemaphore;
        #endif

    std::vector<int32> socketRefCore;

    bool canUsePerf;
#ifdef PCM_USE_PERF
    std::vector< std::vector<int> > perfEventHandle;
    void readPerfData(uint32 core, std::vector<uint64> & data);

    enum {
        PERF_INST_RETIRED_ANY_POS = 0,
        PERF_CPU_CLK_UNHALTED_THREAD_POS = 1,
        PERF_CPU_CLK_UNHALTED_REF_POS = 2,
        PERF_GEN_EVENT_0_POS = 3,
        PERF_GEN_EVENT_1_POS = 4,
        PERF_GEN_EVENT_2_POS = 5,
        PERF_GEN_EVENT_3_POS = 6
    };

    enum {
        PERF_GROUP_LEADER_COUNTER = PERF_INST_RETIRED_ANY_POS 
    };
#endif
    std::ofstream *outfile; // output file stream
    std::streambuf *backup_ofile; // backup of original output = cout
    int run_state; // either running (1) or sleeping (0)

    bool PMUinUse();
    void cleanupPMU();
    void freeRMID();
    bool decrementInstanceSemaphore(); // returns true if it was the last instance

#ifdef __APPLE__
    // OSX does not have sem_getvalue, so we must get the number of instances by a different method
    uint32 getNumInstances();
    uint32 decrementNumInstances();
    uint32 incrementNumInstances();
#endif


    void computeQPISpeedBeckton(int core_nr);
    void destroyMSR();
    void computeNominalFrequency();
    static bool isCPUModelSupported(int model_);
    std::string getSupportedUarchCodenames() const;
    std::string getUnsupportedMessage() const;
    bool detectModel();
    bool checkModel();

    void initCStateSupportTables();
    bool discoverSystemTopology();
    void printSystemTopology() const;
    void initMSR();
    bool detectNominalFrequency();
    void initEnergyMonitoring();
    void initUncoreObjects();
    void initL3CacheOccupancyMonitoring();
    void programBecktonUncore(int core);
    void programNehalemEPUncore(int core);
    void enableJKTWorkaround(bool enable);
    template <class CounterStateType>
    void readAndAggregateUncoreMCCounters(const uint32 socket, CounterStateType & counterState);
    template <class CounterStateType>
    void readAndAggregateEnergyCounters(const uint32 socket, CounterStateType & counterState);
    template <class CounterStateType>
    void readPackageThermalHeadroom(const uint32 socket, CounterStateType & counterState);
    template <class CounterStateType>
    void readAndAggregatePackageCStateResidencies(SafeMsrHandle * msr, CounterStateType & result);
    void readQPICounters(SystemCounterState & counterState);
    void reportQPISpeed() const;

    uint32 CX_MSR_PMON_CTRY(uint32 Cbo, uint32 Ctr) const;
    uint32 CX_MSR_PMON_BOX_FILTER(uint32 Cbo) const;
    uint32 CX_MSR_PMON_BOX_FILTER1(uint32 Cbo) const;
    uint32 CX_MSR_PMON_CTLY(uint32 Cbo, uint32 Ctl) const;
    uint32 CX_MSR_PMON_BOX_CTL(uint32 Cbo) const;
    uint32 getMaxNumOfCBoxes() const;
    void programCboOpcodeFilter(const uint32 opc, const uint32 cbo, SafeMsrHandle * msr);

public:
    bool L3CacheOccupancyMetricAvailable();

    unsigned getMaxRMID() const;

    static PCM * getInstance();        // the only way to get access

    bool good();                       // true if access to CPU counters works

    const std::string & getErrorMessage() const
    {
        return errorMessage;
    }

    ErrorCode program(const ProgramMode mode_ = DEFAULT_EVENTS, const void * parameter_ = NULL); // program counters and start counting

    ErrorCode programServerUncorePowerMetrics(int mc_profile, int pcu_profile, int * freq_bands = NULL);
    
    void freezeServerUncoreCounters();

    void unfreezeServerUncoreCounters();

    ServerUncorePowerState getServerUncorePowerState(uint32 socket);
    
    void cleanup();

    void resetPMU();

    void getAllCounterStates(SystemCounterState & systemState, std::vector<SocketCounterState> & socketStates, std::vector<CoreCounterState> & coreStates);

    bool isCoreOnline(int32 os_core_id) const;
    
    SystemCounterState getSystemCounterState();

    SocketCounterState getSocketCounterState(uint32 socket);

    CoreCounterState getCoreCounterState(uint32 core);

    uint32 getNumCores();
    
    uint32 getNumOnlineCores();

    uint32 getNumSockets();

    uint32 getThreadsPerCore();

    bool getSMT();                // returns true iff SMT ("Hyperthreading") is on

    uint64 getNominalFrequency(); // in Hz

    uint32 getL3ScalingFactor();

    enum SupportedCPUModels
    {
        NEHALEM_EP = 26,
        NEHALEM = 30,
        ATOM = 28,
        ATOM_2 = 53,
        ATOM_CENTERTON = 54,
        ATOM_BAYTRAIL = 55,
        ATOM_AVOTON = 77,
        CLARKDALE = 37,
        WESTMERE_EP = 44,
        NEHALEM_EX = 46,
        WESTMERE_EX = 47,
        SANDY_BRIDGE = 42,
        JAKETOWN = 45,
        IVY_BRIDGE = 58,
        HASWELL = 60,
        HASWELL_ULT = 69,
        HASWELL_2 = 70,
        IVYTOWN = 62,
        HASWELLX = 63,
        BROADWELL = 61,
        END_OF_MODEL_LIST = 0x0ffff
    };

    uint32 getCPUModel() { return cpu_model; }

    uint32 getOriginalCPUModel() { return original_cpu_model; }

    int32 getSocketId(uint32 core_id)
    {
        return topology[core_id].socket;
    }

    uint64 getQPILinksPerSocket() const
    {
        switch (cpu_model)
        {
        case NEHALEM_EP:
        case WESTMERE_EP:
        case CLARKDALE:
            if (num_sockets == 2)
                return 2;
            else
                return 1;
        case NEHALEM_EX:
        case WESTMERE_EX:
            return 4;
        case JAKETOWN:
        case IVYTOWN:
        case HASWELLX:
            return (server_pcicfg_uncore && server_pcicfg_uncore[0])?(server_pcicfg_uncore[0]->getNumQPIPorts()):0;
        }
        return 0;
    }

    uint32 getMCPerSocket() const
    {
        switch (cpu_model)
        {
        case NEHALEM_EP:
        case WESTMERE_EP:
        case CLARKDALE:
            return 1;
        case NEHALEM_EX:
        case WESTMERE_EX:
            return 2;
        case JAKETOWN:
        case IVYTOWN:
        case HASWELLX:
            return (server_pcicfg_uncore && server_pcicfg_uncore[0])?(server_pcicfg_uncore[0]->getNumMC()):0;
        }
        return 0;
    }

    uint32 getMCChannelsPerSocket() const
    {
        switch (cpu_model)
        {
        case NEHALEM_EP:
        case WESTMERE_EP:
        case CLARKDALE:
            return 3;
        case NEHALEM_EX:
        case WESTMERE_EX:
            return 4;
        case JAKETOWN:
        case IVYTOWN:
        case HASWELLX:
            return (server_pcicfg_uncore && server_pcicfg_uncore[0])?(server_pcicfg_uncore[0]->getNumMCChannels()):0;
        }
        return 0;
    }

    uint32 getMaxIPC() const
    {
        switch (cpu_model)
        {
        case NEHALEM_EP:
        case WESTMERE_EP:
        case NEHALEM_EX:
        case WESTMERE_EX:
        case CLARKDALE:
        case SANDY_BRIDGE:
        case JAKETOWN:
        case IVYTOWN:
        case IVY_BRIDGE:
        case HASWELL:
        case HASWELLX:
        case BROADWELL:
            return 4;
        case ATOM:
            return 2;
        }
        return 0;
    }

    uint64 getPCUFrequency() const
    {
        switch (cpu_model)
        {
        case JAKETOWN:
        case IVYTOWN:
            return 800000000ULL; // 800 MHz
        case HASWELLX:
            return 1000000000ULL; // 1 GHz
        }
        return 0;
    }

    uint64 getTickCount(uint64 multiplier = 1000 /* ms */, uint32 core = 0);

    uint64 getTickCountRDTSCP(uint64 multiplier = 1000 /* ms */);


    uint64 getQPILinkSpeed(uint32 socketNr, uint32 linkNr) const
       { return hasPCICFGUncore() ? server_pcicfg_uncore[socketNr]->getQPILinkSpeed(linkNr) : max_qpi_speed; }

    double getJoulesPerEnergyUnit() const { return joulesPerEnergyUnit; }

    int32 getPackageThermalSpecPower() const { return pkgThermalSpecPower; }

    int32 getPackageMinimumPower() const { return pkgMinimumPower; }

    int32 getPackageMaximumPower() const { return pkgMaximumPower; }

    static bool initWinRing0Lib();

    inline void disableJKTWorkaround() { disable_JKT_workaround = true; }

    enum PCIeEventCode
    {
        // PCIe read events (PCI devices reading from memory - application writes to disk/network/PCIe device)
        PCIeRdCur = 0x19E, // PCIe read current (full cache line)
        PCIeNSRd = 0x1E4,  // PCIe non-snoop read (full cache line)
        // PCIe write events (PCI devices writing to memory - application reads from disk/network/PCIe device)
        PCIeWiLF = 0x194,  // PCIe Write (non-allocating) (full cache line)
        PCIeItoM = 0x19C,  // PCIe Write (allocating) (full cache line)
        PCIeNSWr = 0x1E5,  // PCIe Non-snoop write (partial cache line)
        PCIeNSWrF = 0x1E6, // PCIe Non-snoop write (full cache line)
        // events shared by CPU and IO
        RFO = 0x180,       // Demand Data RFO; share the same code for CPU, use tid to filter PCIe only traffic
        CRd = 0x181,       // Demand Code Read
        DRd = 0x182,       // Demand Data Read
        PRd = 0x187,       // Partial Reads (UC) (MMIO Read)
        WiL = 0x18F,       // Write Invalidate Line - partial (MMIO write), PL: Not documented in HSX/IVT
        ItoM = 0x1C8,      // Request Invalidate Line; share the same code for CPU, use tid to filter PCIe only traffic
    };

    enum CBoEventTid
    {
        RFOtid = 0x3E,
        ItoMtid = 0x3E,
    };
    
    void programPCIeCounters(const PCIeEventCode event_, const uint32 tid_ = 0, const uint32 miss_ = 0);
    void programPCIeMissCounters(const PCIeEventCode event_, const uint32 tid_ = 0);

    PCIeCounterState getPCIeCounterState(const uint32 socket_);

    uint64 extractCoreGenCounterValue(uint64 val);
    uint64 extractCoreFixedCounterValue(uint64 val);
    uint64 extractUncoreGenCounterValue(uint64 val);
    uint64 extractUncoreFixedCounterValue(uint64 val);
    uint64 extractL3CacheOccupancy(uint64 val);

    const char * getUArchCodename(int32 cpu_model_ = -1) const;

    static std::string getCPUBrandString();

    bool packageEnergyMetricsAvailable() const
    {
        return (
                    cpu_model == PCM::JAKETOWN
                 || cpu_model == PCM::IVYTOWN
                 || cpu_model == PCM::SANDY_BRIDGE 
                 || cpu_model == PCM::IVY_BRIDGE
                 || cpu_model == PCM::HASWELL
                 || original_cpu_model == PCM::ATOM_AVOTON
                 || cpu_model == PCM::HASWELLX
                 || cpu_model == PCM::BROADWELL
               );
    }

    bool dramEnergyMetricsAvailable() const
    {
        return ( 
             cpu_model == PCM::JAKETOWN
          || cpu_model == PCM::IVYTOWN
          || cpu_model == PCM::HASWELLX
          );
    }

    bool packageThermalMetricsAvailable() const
    {
        return packageEnergyMetricsAvailable();
    }

    bool outgoingQPITrafficMetricsAvailable() const
    {
        return (
                cpu_model == PCM::NEHALEM_EX 
            ||  cpu_model == PCM::WESTMERE_EX 
            ||  cpu_model == PCM::JAKETOWN
            ||  cpu_model == PCM::IVYTOWN
            ||  cpu_model == PCM::HASWELLX
               );
    }

    bool qpiUtilizationMetricsAvailable() const
    {
        return outgoingQPITrafficMetricsAvailable();
    }

    bool memoryTrafficMetricsAvailable() const
    {
        return !(
                  cpu_model == PCM::ATOM 
               || cpu_model == PCM::CLARKDALE
               );
    }
    
    bool memoryIOTrafficMetricAvailable() const
    {
        return (
                cpu_model == PCM::SANDY_BRIDGE
            ||  cpu_model == PCM::IVY_BRIDGE
            ||  cpu_model == PCM::HASWELL
            ||  cpu_model == PCM::BROADWELL
               );
    }

    bool hasBecktonUncore() const
    {
        return (
              cpu_model == PCM::NEHALEM_EX
          ||  cpu_model == PCM::WESTMERE_EX
               );
    }
    bool hasPCICFGUncore() const // has PCICFG uncore PMON
    {
        return (
              cpu_model == PCM::JAKETOWN
          ||  cpu_model == PCM::IVYTOWN
          ||  cpu_model == PCM::HASWELLX
               );
    }

    ~PCM();
};

class BasicCounterState
{
    friend class PCM;
    template <class CounterStateType>
    friend double getExecUsage(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend double getIPC(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend double getAverageFrequency(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend double getActiveAverageFrequency(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend double getCyclesLostDueL3CacheMisses(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend double getCyclesLostDueL2CacheMisses(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend double getRelativeFrequency(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend double getActiveRelativeFrequency(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend double getL2CacheHitRatio(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend double getL3CacheHitRatio(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getL3CacheMisses(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getL2CacheMisses(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getL2CacheHits(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getL3CacheOccupancy(const CounterStateType & now);
    template <class CounterStateType>
    friend uint64 getCycles(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getInstructionsRetired(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getCycles(const CounterStateType & now);
    template <class CounterStateType>
    friend uint64 getInstructionsRetired(const CounterStateType & now);
    template <class CounterStateType>
    friend uint64 getL3CacheHitsNoSnoop(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getL3CacheHitsSnoop(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getL3CacheHits(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getNumberOfCustomEvents(int32 eventCounterNr, const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getInvariantTSC(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getRefCycles(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend double getCoreCStateResidency(int state, const CounterStateType & before, const CounterStateType & after);
protected:
    uint64 InstRetiredAny;
    uint64 CpuClkUnhaltedThread;
    uint64 CpuClkUnhaltedRef;
    // dont put any additional fields between Event 0-Event 3 because getNumberOfCustomEvents assumes there are none
    union {
        uint64 L3Miss;
        uint64 Event0;
        uint64 ArchLLCMiss;
    };
    union {
        uint64 L3UnsharedHit;
        uint64 Event1;
        uint64 ArchLLCRef;
    };
    union {
        uint64 L2HitM;
        uint64 Event2;
    };
    union {
        uint64 L2Hit;
        uint64 Event3;
    };
    uint64 InvariantTSC; // invariant time stamp counter
    uint64 CStateResidency[PCM::MAX_C_STATE + 1];
    int32 ThermalHeadroom;
    uint64 L3Occupancy;
    void readAndAggregate(SafeMsrHandle *);
public:
    BasicCounterState() : 
      InstRetiredAny(0)
    , CpuClkUnhaltedThread(0)
    , CpuClkUnhaltedRef(0)
    , L3Miss(0)
    , L3UnsharedHit(0)
    , L2HitM(0)
    , L2Hit(0)
    , InvariantTSC(0) 
    , ThermalHeadroom(PCM_INVALID_THERMAL_HEADROOM)
    , L3Occupancy(0)
    {
        memset(&(CStateResidency[0]), 0, sizeof(CStateResidency));
    }
    virtual ~BasicCounterState() { }

    BasicCounterState & operator += (const BasicCounterState & o)
    {
        InstRetiredAny += o.InstRetiredAny;
        CpuClkUnhaltedThread += o.CpuClkUnhaltedThread;
        CpuClkUnhaltedRef += o.CpuClkUnhaltedRef;
        Event0 += o.Event0;
        Event1 += o.Event1;
        Event2 += o.Event2;
        Event3 += o.Event3;
        InvariantTSC += o.InvariantTSC;
        for(int i=0; i <= PCM::MAX_C_STATE ;++i)
            CStateResidency[i] += o.CStateResidency[i];
        // ThermalHeadroom is not accumulative
    L3Occupancy += o.L3Occupancy;
        return *this;
    }

   int32 getThermalHeadroom() const  { return ThermalHeadroom; }
};

template <class CounterStateType>
uint64 getQPIClocks(uint32 port, const CounterStateType & before, const CounterStateType & after)
{
  return after.QPIClocks[port] - before.QPIClocks[port];
}


template <class CounterStateType>
int32 getThermalHeadroom(const CounterStateType & /* before */, const CounterStateType & after)
{
  return after.getThermalHeadroom();
}

template <class CounterStateType>
uint64 getQPIL0pTxCycles(uint32 port, const CounterStateType & before, const CounterStateType & after)
{
  return after.QPIL0pTxCycles[port] - before.QPIL0pTxCycles[port];
}

template <class CounterStateType>
uint64 getQPIL1Cycles(uint32 port, const CounterStateType & before, const CounterStateType & after)
{
  return after.QPIL1Cycles[port] - before.QPIL1Cycles[port];
}

template <class CounterStateType>
double getNormalizedQPIL0pTxCycles(uint32 port, const CounterStateType & before, const CounterStateType & after)
{
  return double(getQPIL0pTxCycles(port,before,after))/double(getQPIClocks(port,before,after));
}

template <class CounterStateType>
double getNormalizedQPIL1Cycles(uint32 port, const CounterStateType & before, const CounterStateType & after)
{
  return double(getQPIL1Cycles(port,before,after))/double(getQPIClocks(port,before,after));
}

template <class CounterStateType>
uint64 getDRAMClocks(uint32 channel, const CounterStateType & before, const CounterStateType & after)
{
  return after.DRAMClocks[channel] - before.DRAMClocks[channel];
}

template <class CounterStateType>
uint64 getMCCounter(uint32 channel, uint32 counter, const CounterStateType & before, const CounterStateType & after)
{
  return after.MCCounter[channel][counter] - before.MCCounter[channel][counter];
}

template <class CounterStateType>
uint64 getPCUCounter(uint32 counter, const CounterStateType & before, const CounterStateType & after)
{
    return after.PCUCounter[counter] - before.PCUCounter[counter];
}

template <class CounterStateType>
uint64 getPCUClocks(const CounterStateType & before, const CounterStateType & after)
{
    return getPCUCounter(0,before,after);
}

template <class CounterStateType>
uint64 getConsumedEnergy(const CounterStateType & before, const CounterStateType & after)
{
    return after.PackageEnergyStatus - before.PackageEnergyStatus;
}

template <class CounterStateType>
uint64 getDRAMConsumedEnergy(const CounterStateType & before, const CounterStateType & after)
{
    return after.DRAMEnergyStatus - before.DRAMEnergyStatus;
}

template <class CounterStateType>
double getConsumedJoules(const CounterStateType & before, const CounterStateType & after)
{
    PCM * m = PCM::getInstance();
    if(!m) return -1.;  
 
    return double(getConsumedEnergy(before,after))*m->getJoulesPerEnergyUnit();
}

template <class CounterStateType>
double getDRAMConsumedJoules(const CounterStateType & before, const CounterStateType & after)
{
   PCM * m = PCM::getInstance();
   if(!m) return -1.;
   double dram_joules_per_energy_unit;

    if(PCM::HASWELLX == m->getCPUModel()) {
/* as described in sections 5.3.2 (DRAM_POWER_INFO) and 5.3.3 (DRAM_ENERGY_STATUS) of
 * Volume 2 (Registers) of
 * Intel Xeon E5-1600 v3 and Intel Xeon E5-2600 v3 (Haswell-EP) Datasheet (Ref 330784-001, Sept.2014)
 * ENERGY_UNIT for DRAM domain is fixed to 15.3 uJ for server Haswell processors.
 */
        dram_joules_per_energy_unit=0.0000153;
    } else {
/* for all other processors (including Haswell client/mobile SKUs) the ENERGY_UNIT for DRAM domain
 * should be read from PACKAGE_POWER_SKU register (usually value around ~61uJ)
 */
        dram_joules_per_energy_unit=m->getJoulesPerEnergyUnit();
    }
    return double(getDRAMConsumedEnergy(before,after))*dram_joules_per_energy_unit;
}


class UncoreCounterState
{
    friend class PCM;
    template <class CounterStateType>
    friend uint64 getBytesReadFromMC(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getBytesWrittenToMC(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getIORequestBytesFromMC(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getConsumedEnergy(const CounterStateType & before, const CounterStateType & after);
    template <class CounterStateType>
    friend uint64 getDRAMConsumedEnergy(const CounterStateType & before, const CounterStateType & after);    
    template <class CounterStateType>
    friend double getPackageCStateResidency(int state, const CounterStateType & before, const CounterStateType & after);
protected:
    uint64 UncMCFullWrites;
    uint64 UncMCNormalReads;
    uint64 UncMCIORequests;
    uint64 PackageEnergyStatus;
    uint64 DRAMEnergyStatus;
    uint64 CStateResidency[PCM::MAX_C_STATE + 1];
    void readAndAggregate(SafeMsrHandle *);
public:
    UncoreCounterState() :
       UncMCFullWrites(0)
     , UncMCNormalReads(0)
     , UncMCIORequests(0)
     , PackageEnergyStatus(0)
     , DRAMEnergyStatus(0)
    {
        memset(&(CStateResidency[0]), 0, sizeof(CStateResidency));
    }
    virtual ~UncoreCounterState() { }

    UncoreCounterState & operator += (const UncoreCounterState & o)
    {
        UncMCFullWrites += o.UncMCFullWrites;
        UncMCNormalReads += o.UncMCNormalReads;
        UncMCIORequests += o.UncMCIORequests;
        PackageEnergyStatus += o.PackageEnergyStatus;
        DRAMEnergyStatus += o.DRAMEnergyStatus;
        for(int i=0; i <= PCM::MAX_C_STATE ;++i)
            CStateResidency[i] += o.CStateResidency[i];
        return *this;
    }
};


class ServerUncorePowerState: public UncoreCounterState
{
   uint64 QPIClocks[3], QPIL0pTxCycles[3], QPIL1Cycles[3];
   uint64 DRAMClocks[8];
   uint64 MCCounter[8][4];// channel X counter
   uint64 PCUCounter[4];
   int32 PackageThermalHeadroom;
   uint64 InvariantTSC; // invariant time stamp counter
   friend class PCM;
   template <class CounterStateType>
   friend uint64 getQPIClocks(uint32 port, const CounterStateType & before, const CounterStateType & after);
   template <class CounterStateType>
   friend uint64 getQPIL0pTxCycles(uint32 port, const CounterStateType & before, const CounterStateType & after);
   template <class CounterStateType>
   friend uint64 getQPIL1Cycles(uint32 port, const CounterStateType & before, const CounterStateType & after);
   template <class CounterStateType>
   friend uint64 getDRAMClocks(uint32 channel, const CounterStateType & before, const CounterStateType & after);
   template <class CounterStateType>
   friend uint64 getMCCounter(uint32 channel, uint32 counter, const CounterStateType & before, const CounterStateType & after);
   template <class CounterStateType>
   friend uint64 getPCUCounter(uint32 counter, const CounterStateType & before, const CounterStateType & after);
   template <class CounterStateType>
   friend uint64 getConsumedEnergy(const CounterStateType & before, const CounterStateType & after);
   template <class CounterStateType>
   friend uint64 getDRAMConsumedEnergy(const CounterStateType & before, const CounterStateType & after);
   template <class CounterStateType>
   friend uint64 getInvariantTSC(const CounterStateType & before, const CounterStateType & after);
public:
   int32 getPackageThermalHeadroom() const  { return PackageThermalHeadroom; }
   ServerUncorePowerState() :
      PackageThermalHeadroom(0)
    , InvariantTSC(0)
   {
      memset(&(QPIClocks[0]), 0, 3*sizeof(uint64));
      memset(&(QPIL0pTxCycles[0]), 0, 3*sizeof(uint64));
      memset(&(QPIL1Cycles[0]), 0, 3*sizeof(uint64));
      memset(&(DRAMClocks[0]), 0, 8*sizeof(uint64));
      memset(&(PCUCounter[0]), 0, 4*sizeof(uint64));
      for(int i=0;i<8;++i)
        memset(&(MCCounter[i][0]), 0, 4*sizeof(uint64));
   }
};

class CoreCounterState : public BasicCounterState
{
    friend class PCM;

public:
};

class SocketCounterState : public BasicCounterState, public UncoreCounterState
{
    friend class PCM;

protected:
    void readAndAggregate(SafeMsrHandle * handle)
    {
        BasicCounterState::readAndAggregate(handle);
        UncoreCounterState::readAndAggregate(handle);
    }

public:
    void accumulateCoreState(const CoreCounterState & o)
    {
        BasicCounterState::operator += (o);
    }
};

class SystemCounterState : public BasicCounterState, public UncoreCounterState
{
    friend class PCM;
    std::vector<std::vector<uint64> > incomingQPIPackets;
    std::vector<std::vector<uint64> > outgoingQPIIdleFlits;
    std::vector<std::vector<uint64> > outgoingQPIDataNonDataFlits;
    uint64 uncoreTSC;

protected:
    void readAndAggregate(SafeMsrHandle * handle)
    {
        BasicCounterState::readAndAggregate(handle);
        UncoreCounterState::readAndAggregate(handle);
    }

public:
    friend uint64 getIncomingQPILinkBytes(uint32 socketNr, uint32 linkNr, const SystemCounterState & before, const SystemCounterState & after);
    friend uint64 getIncomingQPILinkBytes(uint32 socketNr, uint32 linkNr, const SystemCounterState & now);
    friend double getOutgoingQPILinkUtilization(uint32 socketNr, uint32 linkNr, const SystemCounterState & before, const SystemCounterState & after);
    friend uint64 getOutgoingQPILinkBytes(uint32 socketNr, uint32 linkNr, const SystemCounterState & before, const SystemCounterState & after);
    friend uint64 getOutgoingQPILinkBytes(uint32 socketNr, uint32 linkNr, const SystemCounterState & now);
    SystemCounterState() :
        uncoreTSC(0)
    {
        PCM * m = PCM::getInstance();
        incomingQPIPackets.resize(m->getNumSockets(),
                                  std::vector<uint64>((uint32)m->getQPILinksPerSocket(), 0));
        outgoingQPIIdleFlits.resize(m->getNumSockets(),
                                    std::vector<uint64>((uint32)m->getQPILinksPerSocket(), 0));
        outgoingQPIDataNonDataFlits.resize(m->getNumSockets(),
                                    std::vector<uint64>((uint32)m->getQPILinksPerSocket(), 0));
    }

    void accumulateSocketState(const SocketCounterState & o)
    {
        if (&o != NULL) // security check requirement
        {
            BasicCounterState::operator += (o);
            UncoreCounterState::operator += (o);
        }
    }
};

INTELPCM_API SystemCounterState getSystemCounterState();

INTELPCM_API SocketCounterState getSocketCounterState(uint32 socket);

INTELPCM_API CoreCounterState getCoreCounterState(uint32 core);


template <class CounterStateType>
double getIPC(const CounterStateType & before, const CounterStateType & after) // instructions per cycle
{
    int64 clocks = after.CpuClkUnhaltedThread - before.CpuClkUnhaltedThread;
    if (clocks != 0)
        return double(after.InstRetiredAny - before.InstRetiredAny) / double(clocks);
    return -1;
}


template <class CounterStateType>
uint64 getInstructionsRetired(const CounterStateType & before, const CounterStateType & after) // instructions
{
    return after.InstRetiredAny - before.InstRetiredAny;
}

template <class CounterStateType>
double getExecUsage(const CounterStateType & before, const CounterStateType & after) // usage
{
    int64 timer_clocks = after.InvariantTSC - before.InvariantTSC;
    if (timer_clocks != 0)
        return double(after.InstRetiredAny - before.InstRetiredAny) / double(timer_clocks);
    return -1;
}

template <class CounterStateType>
uint64 getInstructionsRetired(const CounterStateType & now) // instructions
{
    return now.InstRetiredAny;
}

template <class CounterStateType>
uint64 getCycles(const CounterStateType & before, const CounterStateType & after) // clocks
{
    return after.CpuClkUnhaltedThread - before.CpuClkUnhaltedThread;
}

template <class CounterStateType>
uint64 getRefCycles(const CounterStateType & before, const CounterStateType & after) // clocks
{
    return after.CpuClkUnhaltedRef - before.CpuClkUnhaltedRef;
}

template <class CounterStateType>
uint64 getCycles(const CounterStateType & now) // clocks
{
    return now.CpuClkUnhaltedThread;
}

inline double getCoreIPC(const SystemCounterState & before, const SystemCounterState & after) // instructions per cycle
{
    double ipc = getIPC(before, after);
    PCM * m = PCM::getInstance();
    if (ipc >= 0. && m && (m->getNumCores() == m->getNumOnlineCores()))
        return ipc * double(m->getThreadsPerCore());
    return -1;
}




inline double getTotalExecUsage(const SystemCounterState & before, const SystemCounterState & after) // usage
{
    double usage = getExecUsage(before, after);
    PCM * m = PCM::getInstance();
    if (usage >= 0. && m && (m->getNumCores() == m->getNumOnlineCores()))
        return usage * double(m->getThreadsPerCore());
    return -1;
}

template <class CounterStateType>
double getAverageFrequency(const CounterStateType & before, const CounterStateType & after) // in Hz
{
    int64 clocks = after.CpuClkUnhaltedThread - before.CpuClkUnhaltedThread;
    int64 timer_clocks = after.InvariantTSC - before.InvariantTSC;
    PCM * m = PCM::getInstance();
    if (timer_clocks != 0 && m)
        return double(m->getNominalFrequency()) * double(clocks) / double(timer_clocks);
    return -1;
}

template <class CounterStateType>
double getActiveAverageFrequency(const CounterStateType & before, const CounterStateType & after) // in Hz
{
    int64 clocks = after.CpuClkUnhaltedThread - before.CpuClkUnhaltedThread;
    int64 ref_clocks = after.CpuClkUnhaltedRef - before.CpuClkUnhaltedRef;
    PCM * m = PCM::getInstance();
    if (ref_clocks != 0 && m)
        return double(m->getNominalFrequency()) * double(clocks) / double(ref_clocks);
    return -1;
}

template <class CounterStateType>
double getRelativeFrequency(const CounterStateType & before, const CounterStateType & after) // fraction of nominal frequency
{
    int64 clocks = after.CpuClkUnhaltedThread - before.CpuClkUnhaltedThread;
    int64 timer_clocks = after.InvariantTSC - before.InvariantTSC;
    if (timer_clocks != 0)
        return double(clocks) / double(timer_clocks);
    return -1;
}

template <class CounterStateType>
double getActiveRelativeFrequency(const CounterStateType & before, const CounterStateType & after) // fraction of nominal frequency
{
    int64 clocks = after.CpuClkUnhaltedThread - before.CpuClkUnhaltedThread;
    int64 ref_clocks = after.CpuClkUnhaltedRef - before.CpuClkUnhaltedRef;
    if (ref_clocks != 0)
        return double(clocks) / double(ref_clocks);
    return -1;
}

template <class CounterStateType>
double getCyclesLostDueL3CacheMisses(const CounterStateType & before, const CounterStateType & after) // 0.0 - 1.0
{
    if (PCM::getInstance()->getCPUModel() == PCM::ATOM) return -1;
    int64 clocks = after.CpuClkUnhaltedThread - before.CpuClkUnhaltedThread;
    if (clocks != 0)
    {
        return 180. * double(after.L3Miss - before.L3Miss) / double(clocks);
    }
    return -1;
}

template <class CounterStateType>
double getCyclesLostDueL2CacheMisses(const CounterStateType & before, const CounterStateType & after) // 0.0 - 1.0
{
    if (PCM::getInstance()->getCPUModel() == PCM::ATOM) return -1;
    int64 clocks = after.CpuClkUnhaltedThread - before.CpuClkUnhaltedThread;
    if (clocks != 0)
    {
        double L3UnsharedHit = (double)(after.L3UnsharedHit - before.L3UnsharedHit);
        double L2HitM = (double)(after.L2HitM - before.L2HitM);
        return (35. * L3UnsharedHit + 74. * L2HitM) / double(clocks);
    }
    return -1;
}

template <class CounterStateType>
double getL2CacheHitRatio(const CounterStateType & before, const CounterStateType & after) // 0.0 - 1.0
{
    if (PCM::getInstance()->getCPUModel() == PCM::ATOM)
    {
        uint64 L2Miss = after.ArchLLCMiss - before.ArchLLCMiss;
        uint64 L2Ref = after.ArchLLCRef - before.ArchLLCRef;
        if (L2Ref) return 1. - (double(L2Miss) / double(L2Ref));
        return 1;
    }
    uint64 L3Miss = after.L3Miss - before.L3Miss;
    uint64 L3UnsharedHit = after.L3UnsharedHit - before.L3UnsharedHit;
    uint64 L2HitM = after.L2HitM - before.L2HitM;
    uint64 L2Hit = after.L2Hit - before.L2Hit;
    uint64 hits = L2Hit;
    uint64 all = L2Hit + L2HitM + L3UnsharedHit + L3Miss;
    if (all) return double(hits) / double(all);

    return 1;
}

template <class CounterStateType>
double getL3CacheHitRatio(const CounterStateType & before, const CounterStateType & after) // 0.0 - 1.0
{
    if (PCM::getInstance()->getCPUModel() == PCM::ATOM) return -1;

    uint64 L3Miss = after.L3Miss - before.L3Miss;
    uint64 L3UnsharedHit = after.L3UnsharedHit - before.L3UnsharedHit;
    uint64 L2HitM = after.L2HitM - before.L2HitM;
    uint64 hits = L3UnsharedHit + L2HitM;
    uint64 all = L2HitM + L3UnsharedHit + L3Miss;
    if (all) return double(hits) / double(all);

    return 1;
}

template <class CounterStateType>
uint64 getL3CacheMisses(const CounterStateType & before, const CounterStateType & after)
{
    if (PCM::getInstance()->getCPUModel() == PCM::ATOM) return 0;
    return after.L3Miss - before.L3Miss;
}

template <class CounterStateType>
uint64 getL2CacheMisses(const CounterStateType & before, const CounterStateType & after)
{
    if (PCM::getInstance()->getCPUModel() == PCM::ATOM)
    {
        return after.ArchLLCMiss - before.ArchLLCMiss;
    }
    uint64 L3Miss = after.L3Miss - before.L3Miss;
    uint64 L3UnsharedHit = after.L3UnsharedHit - before.L3UnsharedHit;
    uint64 L2HitM = after.L2HitM - before.L2HitM;
    return L2HitM + L3UnsharedHit + L3Miss;
}

template <class CounterStateType>
uint64 getL2CacheHits(const CounterStateType & before, const CounterStateType & after)
{
    if (PCM::getInstance()->getCPUModel() == PCM::ATOM)
    {
        uint64 L2Miss = after.ArchLLCMiss - before.ArchLLCMiss;
        uint64 L2Ref = after.ArchLLCRef - before.ArchLLCRef;
        return L2Ref - L2Miss;
    }
    return after.L2Hit - before.L2Hit;
}

template <class CounterStateType>
uint64 getL3CacheOccupancy(const CounterStateType & now)
{

    return now.L3Occupancy ;

}

template <class CounterStateType>
uint64 getL3CacheHitsNoSnoop(const CounterStateType & before, const CounterStateType & after)
{
    if (PCM::getInstance()->getCPUModel() == PCM::ATOM) return 0;
    return after.L3UnsharedHit - before.L3UnsharedHit;
}

template <class CounterStateType>
uint64 getL3CacheHitsSnoop(const CounterStateType & before, const CounterStateType & after)
{
    if (PCM::getInstance()->getCPUModel() == PCM::ATOM) return 0;
    return after.L2HitM - before.L2HitM;
}


template <class CounterStateType>
uint64 getL3CacheHits(const CounterStateType & before, const CounterStateType & after)
{
    if (PCM::getInstance()->getCPUModel() == PCM::ATOM) return 0;
    return getL3CacheHitsSnoop(before, after) + getL3CacheHitsNoSnoop(before, after);
}

template <class CounterStateType>
uint64 getInvariantTSC(const CounterStateType & before, const CounterStateType & after)
{
    return after.InvariantTSC - before.InvariantTSC;
}

template <class CounterStateType>
inline double getCoreCStateResidency(int state, const CounterStateType & before, const CounterStateType & after)
{
    const double tsc = double(getInvariantTSC(before,after));

    if(state == 0) return double(getRefCycles(before,after))/tsc;

    if(state == 1)
    {
        PCM * m = PCM::getInstance();
        double result = 1.0 - double(getRefCycles(before,after))/tsc; // 1.0 - cC0
        for(int i = 2; i <= PCM::MAX_C_STATE; ++i)
            if(m->isCoreCStateResidencySupported(state))
                result -= (after.BasicCounterState::CStateResidency[i] - before.BasicCounterState::CStateResidency[i])/tsc;

        if(result < 0.) result = 0.; // fix counter dissynchronization
        else if(result > 1.) result = 1.; // fix counter dissynchronization

        return result;
    }
    return (after.BasicCounterState::CStateResidency[state] - before.BasicCounterState::CStateResidency[state])/tsc;
}

template <class CounterStateType>
inline double getPackageCStateResidency(int state, const CounterStateType & before, const CounterStateType & after)
{
    return double(after.UncoreCounterState::CStateResidency[state] - before.UncoreCounterState::CStateResidency[state])/double(getInvariantTSC(before,after));
}


template <class CounterStateType>
uint64 getBytesReadFromMC(const CounterStateType & before, const CounterStateType & after)
{
    return (after.UncMCNormalReads - before.UncMCNormalReads) * 64;
}

template <class CounterStateType>
uint64 getBytesWrittenToMC(const CounterStateType & before, const CounterStateType & after)
{
    return (after.UncMCFullWrites - before.UncMCFullWrites) * 64;
}

template <class CounterStateType>
uint64 getIORequestBytesFromMC(const CounterStateType & before, const CounterStateType & after)
{
    return (after.UncMCIORequests - before.UncMCIORequests) * 64;
}

template <class CounterStateType>
uint64 getNumberOfCustomEvents(int32 eventCounterNr, const CounterStateType & before, const CounterStateType & after)
{
    return ((&after.Event0)[eventCounterNr] - (&before.Event0)[eventCounterNr]);
}

inline uint64 getIncomingQPILinkBytes(uint32 socketNr, uint32 linkNr, const SystemCounterState & before, const SystemCounterState & after)
{
    uint64 b = before.incomingQPIPackets[socketNr][linkNr];
    uint64 a = after.incomingQPIPackets[socketNr][linkNr];
    // prevent overflows due to counter dissynchronisation
    return (a > b) ? (64 * (a - b)) : 0;
}

inline double getIncomingQPILinkUtilization(uint32 socketNr, uint32 linkNr, const SystemCounterState & before, const SystemCounterState & after)
{
    PCM * m = PCM::getInstance();
    if (!(m->qpiUtilizationMetricsAvailable())) return 0.;

    const double bytes = (double)getIncomingQPILinkBytes(socketNr, linkNr, before, after);
    const uint64 max_speed = m->getQPILinkSpeed(socketNr, linkNr);
    const double max_bytes = (double)(double(max_speed) * double(getInvariantTSC(before, after) / double(m->getNumCores())) / double(m->getNominalFrequency()));
    return bytes / max_bytes;
}

inline double getOutgoingQPILinkUtilization(uint32 socketNr, uint32 linkNr, const SystemCounterState & before, const SystemCounterState & after)
{
    PCM * m = PCM::getInstance();
    
    if(m->hasBecktonUncore())
    {
       const uint64 b = before.outgoingQPIIdleFlits[socketNr][linkNr];
       const uint64 a = after.outgoingQPIIdleFlits[socketNr][linkNr];
       // prevent overflows due to counter dissynchronisation
       const double idle_flits = (double)((a > b) ? (a - b) : 0);
       const uint64 bTSC = before.uncoreTSC;
       const uint64 aTSC = after.uncoreTSC;
       const double tsc = (double)((aTSC > bTSC) ? (aTSC - bTSC) : 0);
       if(idle_flits > tsc) return 0.; // prevent oveflows due to potential counter dissynchronization

       return (1. - (idle_flits / tsc));
    } else if(m->hasPCICFGUncore())
    {
      const uint64 b = before.outgoingQPIDataNonDataFlits[socketNr][linkNr];
      const uint64 a = after.outgoingQPIDataNonDataFlits[socketNr][linkNr];
       // prevent overflows due to counter dissynchronisation
      const double flits = (double)((a > b) ? (a - b) : 0);
      const double max_flits = ((double(getInvariantTSC(before, after))*double(m->getQPILinkSpeed(socketNr, linkNr))/(2.0*4.0))/double(m->getNominalFrequency()))/double(m->getNumCores());
      if(flits > max_flits) return 1.; // prevent oveflows due to potential counter dissynchronization
      return (flits / max_flits);
    }
    
    return 0;
}

inline uint64 getOutgoingQPILinkBytes(uint32 socketNr, uint32 linkNr, const SystemCounterState & before, const SystemCounterState & after)
{
    PCM * m = PCM::getInstance();
    if (!(m->outgoingQPITrafficMetricsAvailable())) return 0;

    const double util = getOutgoingQPILinkUtilization(socketNr, linkNr, before, after);
    const double max_bytes = (double(m->getQPILinkSpeed(socketNr, linkNr)) * double(getInvariantTSC(before, after) / double(m->getNumCores())) / double(m->getNominalFrequency()));

    return (uint64)(max_bytes * util);
}


inline uint64 getAllIncomingQPILinkBytes(const SystemCounterState & before, const SystemCounterState & after)
{
    PCM * m = PCM::getInstance();
    const uint32 ns = m->getNumSockets();
    const uint32 qpiLinks = (uint32)m->getQPILinksPerSocket();
    uint64 sum = 0;

    for (uint32 s = 0; s < ns; ++s)
        for (uint32 q = 0; q < qpiLinks; ++q)
            sum += getIncomingQPILinkBytes(s, q, before, after);

    return sum;
}

inline uint64 getAllOutgoingQPILinkBytes(const SystemCounterState & before, const SystemCounterState & after)
{
    PCM * m = PCM::getInstance();
    const uint32 ns = m->getNumSockets();
    const uint32 qpiLinks = (uint32)m->getQPILinksPerSocket();
    uint64 sum = 0;

    for (uint32 s = 0; s < ns; ++s)
        for (uint32 q = 0; q < qpiLinks; ++q)
            sum += getOutgoingQPILinkBytes(s, q, before, after);

    return sum;
}


inline uint64 getIncomingQPILinkBytes(uint32 socketNr, uint32 linkNr, const SystemCounterState & now)
{
    return 64 * now.incomingQPIPackets[socketNr][linkNr];
}

inline uint64 getSocketIncomingQPILinkBytes(uint32 socketNr, const SystemCounterState & now)
{
    PCM * m = PCM::getInstance();
    const uint32 qpiLinks = (uint32)m->getQPILinksPerSocket();
    uint64 sum = 0;

    for (uint32 q = 0; q < qpiLinks; ++q)
        sum += getIncomingQPILinkBytes(socketNr, q, now);

    return sum;
}

inline uint64 getAllIncomingQPILinkBytes(const SystemCounterState & now)
{
    PCM * m = PCM::getInstance();
    const uint32 ns = m->getNumSockets();
    uint64 sum = 0;

    for (uint32 s = 0; s < ns; ++s)
        sum += getSocketIncomingQPILinkBytes(s, now);
    return sum;
}


inline double getQPItoMCTrafficRatio(const SystemCounterState & before, const SystemCounterState & after)
{
    const uint64 totalQPI = getAllIncomingQPILinkBytes(before, after);
    const uint64 memTraffic = getBytesReadFromMC(before, after) + getBytesWrittenToMC(before, after);
    return double(totalQPI) / double(memTraffic);
}

inline uint64 getNumberOfEvents(PCIeCounterState before, PCIeCounterState after)
{
    return after.data - before.data;
}

#endif