Intel(r) Performance Counter Monitor
Class Hierarchy
This inheritance list is sorted roughly, but not completely, alphabetically:
[detail level 12]
 CCounterWidthExtender::AbstractRawCounter
 CCounterWidthExtender::ClientImcReadsCounter
 CCounterWidthExtender::ClientImcWritesCounter
 CCounterWidthExtender::ClientIoRequestsCounter
 CCounterWidthExtender::MsrHandleCounter
 CAsynchronCounterState
 CBasicCounterStateBasic core counter state
 CCoreCounterState(Logical) core-wide counter state
 CSocketCounterStateSocket-wide counter state
 CSystemCounterStateSystem-wide counter state
 CBecktonUncorePMUCNTCTLRegister
 CBecktonUncorePMUZDPCTLFVCRegister
 CClientBW
 CCounterWidthExtender
 CPCM::CustomCoreEventDescriptionCustom Core event description
 CEventSelectRegister
 CPCM::ExtendedCustomCoreEventDescriptionExtended custom core event description
 CFixedEventControlRegister
 CInstanceLock
 CMCFGHeader
 CMCFGRecord
 CMsrHandle
 CPCIeCounterState
 CPCIeEvents_t
 CPciHandle
 CPciHandleM
 CPciHandleMM
 CPCMCPU Performance Monitor
 CPCM_CPUID_INFO
 CSafeMsrHandle
 Csample_t
 CServerPCICFGUncoreObject to access uncore counters in a socket/processor with microarchitecture codename SandyBridge-EP (Jaketown) or Ivytown-EP or Ivytown-EX
 Cstreambuf
 Cnull_stream
 CT
 CTemporalThreadAffinity
 CTopologyEntry
 CTSXEvent
 CUncoreCounterStateBasic uncore counter state
 CServerUncorePowerStateServer uncore power counter state
 CSocketCounterStateSocket-wide counter state
 CSystemCounterStateSystem-wide counter state
 CUncoreEventSelectRegister